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Mise à jour du SHIM suite à réunion KiCAD (connecteur intercalaire sur GPIO)

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This commit is contained in:
Pierrick C 2017-10-01 09:03:08 +02:00
parent 669a31ce69
commit 5efa599b93
7 changed files with 526 additions and 180 deletions
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13
Serial-SHIM/Serial-SHIM-cache.lib
View File

@ -93,4 +93,17 @@ X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW ENDDRAW
ENDDEF ENDDEF
# #
# PWR_FLAG
#
DEF PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 95 50 H I C CNN
F1 "PWR_FLAG" 0 180 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
X pwr 1 0 0 0 U 50 50 0 0 w
P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
ENDDRAW
ENDDEF
#
#End Library #End Library

106
Serial-SHIM/Serial-SHIM.bak
View File

@ -28,6 +28,7 @@ LIBS:opto
LIBS:atmel LIBS:atmel
LIBS:contrib LIBS:contrib
LIBS:valves LIBS:valves
LIBS:Serial-SHIM-cache
EELAYER 25 0 EELAYER 25 0
EELAYER END EELAYER END
$Descr A4 11693 8268 $Descr A4 11693 8268
@ -48,7 +49,7 @@ U 1 1 59BCE9F7
P 7850 4800 P 7850 4800
F 0 "Serial1" H 7850 5050 50 0000 C CNN F 0 "Serial1" H 7850 5050 50 0000 C CNN
F 1 "CONN_01X04" H 7950 4550 50 0000 C CNN F 1 "CONN_01X04" H 7950 4550 50 0000 C CNN
F 2 "" H 7850 4800 50 0000 C CNN F 2 "Pin_Headers:Pin_Header_Straight_1x04" H 8450 5150 50 0000 C CNN
F 3 "" H 7850 4800 50 0000 C CNN F 3 "" H 7850 4800 50 0000 C CNN
1 7850 4800 1 7850 4800
1 0 0 -1 1 0 0 -1
@ -59,14 +60,11 @@ U 1 1 59BCEAE4
P 6750 4850 P 6750 4850
F 0 "PI-GPIO1" H 6750 5150 50 0000 C CNN F 0 "PI-GPIO1" H 6750 5150 50 0000 C CNN
F 1 "CONN_02X05" H 6750 4550 50 0000 C CNN F 1 "CONN_02X05" H 6750 4550 50 0000 C CNN
F 2 "" H 6750 3650 50 0000 C CNN F 2 "Pin_Headers:Pin_Header_Straight_2x05" H 6200 5250 50 0000 C CNN
F 3 "" H 6750 3650 50 0000 C CNN F 3 "" H 6750 3650 50 0000 C CNN
1 6750 4850 1 6750 4850
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
Wire Wire Line
7000 4650 7650 4650
Connection ~ 7150 4650
Wire Wire Line Wire Wire Line
7000 4850 7550 4850 7000 4850 7550 4850
Wire Wire Line Wire Wire Line
@ -83,10 +81,6 @@ Wire Wire Line
7000 5050 7650 5050 7000 5050 7650 5050
Wire Wire Line Wire Wire Line
7650 5050 7650 4950 7650 5050 7650 4950
Wire Wire Line
7000 4750 7150 4750
Wire Wire Line
7150 4750 7150 4650
$Comp $Comp
L GND #PWR01 L GND #PWR01
U 1 1 59BCEDDF U 1 1 59BCEDDF
@ -100,47 +94,67 @@ F 3 "" H 7300 4850 50 0000 C CNN
$EndComp $EndComp
$Comp $Comp
L +5V #PWR02 L +5V #PWR02
U 1 1 59BCEDF7 U 1 1 59BCF0FF
P 7150 4650 P 7900 4000
F 0 "#PWR02" H 7150 4500 50 0001 C CNN F 0 "#PWR02" H 7900 3850 50 0001 C CNN
F 1 "+5V" H 7150 4790 50 0000 C CNN F 1 "+5V" H 7900 4140 50 0000 C CNN
F 2 "" H 7150 4650 50 0000 C CNN F 2 "" H 7900 4000 50 0000 C CNN
F 3 "" H 7150 4650 50 0000 C CNN F 3 "" H 7900 4000 50 0000 C CNN
1 7150 4650 1 7900 4000
-1 0 0 1
$EndComp
$Comp
L GND #PWR03
U 1 1 59BCF11C
P 8300 4000
F 0 "#PWR03" H 8300 3750 50 0001 C CNN
F 1 "GND" H 8300 3850 50 0000 C CNN
F 2 "" H 8300 4000 50 0000 C CNN
F 3 "" H 8300 4000 50 0000 C CNN
1 8300 4000
1 0 0 -1
$EndComp
Wire Wire Line
7000 4500 7000 4750
Connection ~ 7000 4650
Wire Wire Line
7000 4650 7650 4650
NoConn ~ 6500 4650
NoConn ~ 6500 4750
NoConn ~ 6500 4850
NoConn ~ 6500 4950
NoConn ~ 6500 5050
$Comp
L PWR_FLAG #FLG04
U 1 1 59C3E871
P 7900 4000
F 0 "#FLG04" H 7900 4095 50 0001 C CNN
F 1 "PWR_FLAG" H 7900 4180 50 0000 C CNN
F 2 "" H 7900 4000 50 0000 C CNN
F 3 "" H 7900 4000 50 0000 C CNN
1 7900 4000
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR? L PWR_FLAG #FLG05
U 1 1 59BCEE96 U 1 1 59C3E889
P 6500 4650 P 8300 4000
F 0 "#PWR?" H 6500 4500 50 0001 C CNN F 0 "#FLG05" H 8300 4095 50 0001 C CNN
F 1 "+3.3V" V 6500 4900 50 0000 C CNN F 1 "PWR_FLAG" H 8300 4180 50 0000 C CNN
F 2 "" H 6500 4650 50 0000 C CNN F 2 "" H 8300 4000 50 0000 C CNN
F 3 "" H 6500 4650 50 0000 C CNN F 3 "" H 8300 4000 50 0000 C CNN
1 6500 4650 1 8300 4000
0 -1 -1 0 1 0 0 -1
$EndComp $EndComp
Wire Wire Line
6200 4750 6500 4750
Text GLabel 6200 4750 0 60 Input ~ 0
SDA
Text GLabel 6450 4850 0 60 Input ~ 0
SDC
Text GLabel 6200 4950 0 60 Input ~ 0
GPCLK0
Wire Wire Line
6200 4950 6500 4950
Wire Wire Line
6450 4850 6500 4850
$Comp $Comp
L GND #PWR? L +5V #PWR06
U 1 1 59BCF041 U 1 1 59C3E8A7
P 6500 5050 P 7000 4500
F 0 "#PWR?" H 6500 4800 50 0001 C CNN F 0 "#PWR06" H 7000 4350 50 0001 C CNN
F 1 "GND" V 6500 4850 50 0000 C CNN F 1 "+5V" H 7000 4640 50 0000 C CNN
F 2 "" H 6500 5050 50 0000 C CNN F 2 "" H 7000 4500 50 0000 C CNN
F 3 "" H 6500 5050 50 0000 C CNN F 3 "" H 7000 4500 50 0000 C CNN
1 6500 5050 1 7000 4500
0 1 1 0 1 0 0 -1
$EndComp $EndComp
$EndSCHEMATC $EndSCHEMATC

218
Serial-SHIM/Serial-SHIM.kicad_pcb
View File

@ -2,17 +2,21 @@
(general (general
(links 5) (links 5)
(no_connects 0) (no_connects 1)
(area 0 0 0 0) (area 0 0 0 0)
(thickness 1.6) (thickness 1.6)
(drawings 0) (drawings 4)
(tracks 15) (tracks 14)
(zones 0) (zones 0)
(modules 2) (modules 2)
(nets 10) (nets 10)
) )
(page A4) (page A4)
(title_block
(date 2017-09-21)
)
(layers (layers
(0 F.Cu signal) (0 F.Cu signal)
(31 B.Cu signal) (31 B.Cu signal)
@ -38,10 +42,10 @@
(setup (setup
(last_trace_width 0.25) (last_trace_width 0.25)
(trace_clearance 0.2) (trace_clearance 0.1)
(zone_clearance 0.508) (zone_clearance 0.508)
(zone_45_only no) (zone_45_only no)
(trace_min 0.2) (trace_min 0.15)
(segment_width 0.2) (segment_width 0.2)
(edge_width 0.15) (edge_width 0.15)
(via_size 0.6) (via_size 0.6)
@ -61,7 +65,8 @@
(pad_size 1.524 1.524) (pad_size 1.524 1.524)
(pad_drill 0.762) (pad_drill 0.762)
(pad_to_mask_clearance 0.2) (pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0) (aux_axis_origin 129.54 118.11)
(grid_origin 129.54 118.11)
(visible_elements FFFFFF7F) (visible_elements FFFFFF7F)
(pcbplotparams (pcbplotparams
(layerselection 0x00030_80000001) (layerselection 0x00030_80000001)
@ -92,23 +97,22 @@
(net 0 "") (net 0 "")
(net 1 "Net-(PI-GPIO1-Pad1)") (net 1 "Net-(PI-GPIO1-Pad1)")
(net 2 5V) (net 2 "Net-(PI-GPIO1-Pad3)")
(net 3 "Net-(PI-GPIO1-Pad3)") (net 3 "Net-(PI-GPIO1-Pad5)")
(net 4 "Net-(PI-GPIO1-Pad5)") (net 4 "Net-(PI-GPIO1-Pad6)")
(net 5 "Net-(PI-GPIO1-Pad6)") (net 5 "Net-(PI-GPIO1-Pad7)")
(net 6 "Net-(PI-GPIO1-Pad7)") (net 6 "Net-(PI-GPIO1-Pad8)")
(net 7 "Net-(PI-GPIO1-Pad8)") (net 7 "Net-(PI-GPIO1-Pad9)")
(net 8 "Net-(PI-GPIO1-Pad9)") (net 8 "Net-(PI-GPIO1-Pad10)")
(net 9 "Net-(PI-GPIO1-Pad10)") (net 9 +5V)
(net_class Default "This is the default net class." (net_class Default "This is the default net class."
(clearance 0.2) (clearance 0.1)
(trace_width 0.25) (trace_width 0.25)
(via_dia 0.6) (via_dia 0.6)
(via_drill 0.4) (via_drill 0.4)
(uvia_dia 0.3) (uvia_dia 0.3)
(uvia_drill 0.1) (uvia_drill 0.1)
(add_net 5V)
(add_net "Net-(PI-GPIO1-Pad1)") (add_net "Net-(PI-GPIO1-Pad1)")
(add_net "Net-(PI-GPIO1-Pad10)") (add_net "Net-(PI-GPIO1-Pad10)")
(add_net "Net-(PI-GPIO1-Pad3)") (add_net "Net-(PI-GPIO1-Pad3)")
@ -119,15 +123,25 @@
(add_net "Net-(PI-GPIO1-Pad9)") (add_net "Net-(PI-GPIO1-Pad9)")
) )
(module Pin_Headers:Pin_Header_Straight_2x05 (layer F.Cu) (tedit 0) (tstamp 59BDEFF5) (net_class PWR ""
(at 158.75 102.87) (clearance 0.15)
(trace_width 0.4)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +5V)
)
(module Pin_Headers:Pin_Header_Straight_2x05 (layer F.Cu) (tedit 59C3F72F) (tstamp 59C4A79A)
(at 148.5011 105.0036)
(descr "Through hole pin header") (descr "Through hole pin header")
(tags "pin header") (tags "pin header")
(path /59BCEAE4) (path /59BCEAE4)
(fp_text reference PI-GPIO1 (at 0 -5.1) (layer F.SilkS) (fp_text reference PI-GPIO1 (at -4.9911 10.5664) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_text value CONN_02X05 (at 0 -3.1) (layer F.Fab) (fp_text value CONN_02X05 (at -2.4511 4.2164 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_line (start -1.75 -1.75) (end -1.75 11.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.75 -1.75) (end -1.75 11.95) (layer F.CrtYd) (width 0.05))
@ -145,23 +159,23 @@
(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 1 "Net-(PI-GPIO1-Pad1)")) (net 1 "Net-(PI-GPIO1-Pad1)"))
(pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 2 5V)) (net 9 +5V))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 3 "Net-(PI-GPIO1-Pad3)")) (net 2 "Net-(PI-GPIO1-Pad3)"))
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 2 5V)) (net 9 +5V))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 4 "Net-(PI-GPIO1-Pad5)")) (net 3 "Net-(PI-GPIO1-Pad5)"))
(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 5 "Net-(PI-GPIO1-Pad6)")) (net 4 "Net-(PI-GPIO1-Pad6)"))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(PI-GPIO1-Pad7)")) (net 5 "Net-(PI-GPIO1-Pad7)"))
(pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 7 "Net-(PI-GPIO1-Pad8)")) (net 6 "Net-(PI-GPIO1-Pad8)"))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(PI-GPIO1-Pad9)")) (net 7 "Net-(PI-GPIO1-Pad9)"))
(pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 "Net-(PI-GPIO1-Pad10)")) (net 8 "Net-(PI-GPIO1-Pad10)"))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x05.wrl (model Pin_Headers.3dshapes/Pin_Header_Straight_2x05.wrl
(at (xyz 0.05 -0.2 0)) (at (xyz 0.05 -0.2 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -169,57 +183,117 @@
) )
) )
(module Pin_Headers:Pin_Header_Straight_1x04 (layer F.Cu) (tedit 0) (tstamp 59BDF008) (module Socket_Strips:Socket_Strip_Angled_1x04 (layer F.Cu) (tedit 59C3F728) (tstamp 59C4A7A2)
(at 148.5011 105.0036) (at 140.97 105.41 270)
(descr "Through hole pin header") (descr "Through hole socket strip")
(tags "pin header") (tags "socket strip")
(path /59BCE9F7) (path /59BCE9F7)
(fp_text reference Serial1 (at 0 -5.1) (layer F.SilkS) (fp_text reference Serial1 (at 10.16 7.62 360) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_text value CONN_01X04 (at 0 -3.1) (layer F.Fab) (fp_text value CONN_01X04 (at 3.81 -2.54 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.75 -1.5) (end -1.75 10.6) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.75 -1.75) (end 1.75 9.4) (layer F.CrtYd) (width 0.05)) (fp_line (start 9.4 -1.5) (end 9.4 10.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.75 -1.5) (end 9.4 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 9.4) (end 1.75 9.4) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.75 10.6) (end 9.4 10.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 8.89 10.1) (end 8.89 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end 1.27 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 6.35 10.1) (end 8.89 10.1) (layer F.SilkS) (width 0.15))
(fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15)) (fp_line (start 6.35 1.27) (end 8.89 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 8.89) (end 1.27 8.89) (layer F.SilkS) (width 0.15)) (fp_line (start 3.81 1.27) (end 6.35 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) (fp_line (start 3.81 10.1) (end 6.35 10.1) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15)) (fp_line (start 6.35 10.1) (end 6.35 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15)) (fp_line (start 3.81 10.1) (end 3.81 1.27) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (fp_line (start 1.27 10.1) (end 3.81 10.1) (layer F.SilkS) (width 0.15))
(net 2 5V)) (fp_line (start 1.27 1.27) (end 1.27 10.1) (layer F.SilkS) (width 0.15))
(pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (fp_line (start 1.27 1.27) (end 3.81 1.27) (layer F.SilkS) (width 0.15))
(net 5 "Net-(PI-GPIO1-Pad6)")) (fp_line (start -1.27 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (fp_line (start 0 -1.4) (end -1.55 -1.4) (layer F.SilkS) (width 0.15))
(net 7 "Net-(PI-GPIO1-Pad8)")) (fp_line (start -1.55 -1.4) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (fp_line (start -1.27 1.27) (end -1.27 10.1) (layer F.SilkS) (width 0.15))
(net 9 "Net-(PI-GPIO1-Pad10)")) (fp_line (start -1.27 10.1) (end 1.27 10.1) (layer F.SilkS) (width 0.15))
(model Pin_Headers.3dshapes/Pin_Header_Straight_1x04.wrl (fp_line (start 1.27 10.1) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(at (xyz 0 -0.15 0)) (pad 1 thru_hole rect (at 0 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 +5V))
(pad 2 thru_hole oval (at 2.54 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 4 "Net-(PI-GPIO1-Pad6)"))
(pad 3 thru_hole oval (at 5.08 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(PI-GPIO1-Pad8)"))
(pad 4 thru_hole oval (at 7.62 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(PI-GPIO1-Pad10)"))
(model Socket_Strips.3dshapes/Socket_Strip_Angled_1x04.wrl
(at (xyz 0.15 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
(rotate (xyz 0 0 90)) (rotate (xyz 0 0 180))
) )
) )
(segment (start 161.29 102.87) (end 161.29 105.41) (width 0.25) (layer F.Cu) (net 2)) (gr_line (start 130.81 102.87) (end 130.81 116.84) (angle 90) (layer Edge.Cuts) (width 0.15))
(segment (start 161.29 105.41) (end 160.02 106.68) (width 0.25) (layer F.Cu) (net 2) (tstamp 59BDF023)) (gr_line (start 153.67 102.87) (end 130.81 102.87) (angle 90) (layer Edge.Cuts) (width 0.15))
(segment (start 160.02 106.68) (end 153.67 106.68) (width 0.25) (layer F.Cu) (net 2) (tstamp 59BDF024)) (gr_line (start 153.67 116.84) (end 153.67 102.87) (angle 90) (layer Edge.Cuts) (width 0.15))
(segment (start 153.67 106.68) (end 151.9936 105.0036) (width 0.25) (layer F.Cu) (net 2) (tstamp 59BDF026)) (gr_line (start 153.67 116.84) (end 130.81 116.84) (angle 90) (layer Edge.Cuts) (width 0.15))
(segment (start 151.9936 105.0036) (end 148.5011 105.0036) (width 0.25) (layer F.Cu) (net 2) (tstamp 59BDF028))
(segment (start 161.29 107.95) (end 160.02 109.22) (width 0.25) (layer F.Cu) (net 5))
(segment (start 151.9936 107.5436) (end 148.5011 107.5436) (width 0.25) (layer F.Cu) (net 5) (tstamp 59BDF02E))
(segment (start 153.67 109.22) (end 151.9936 107.5436) (width 0.25) (layer F.Cu) (net 5) (tstamp 59BDF02D))
(segment (start 160.02 109.22) (end 153.67 109.22) (width 0.25) (layer F.Cu) (net 5) (tstamp 59BDF02C))
(segment (start 161.29 110.49) (end 160.02 111.76) (width 0.25) (layer F.Cu) (net 7))
(segment (start 150.1775 111.76) (end 148.5011 110.0836) (width 0.25) (layer F.Cu) (net 7) (tstamp 59BDF034))
(segment (start 160.02 111.76) (end 150.1775 111.76) (width 0.25) (layer F.Cu) (net 7) (tstamp 59BDF033))
(segment (start 161.29 113.03) (end 160.02 114.3) (width 0.25) (layer F.Cu) (net 9))
(segment (start 150.1775 114.3) (end 148.5011 112.6236) (width 0.25) (layer F.Cu) (net 9) (tstamp 59BDF039))
(segment (start 160.02 114.3) (end 150.1775 114.3) (width 0.25) (layer F.Cu) (net 9) (tstamp 59BDF038))
(segment (start 151.0411 112.6236) (end 151.0411 112.4331) (width 0.25) (layer F.Cu) (net 6))
(segment (start 151.0411 112.4331) (end 149.86 111.252) (width 0.25) (layer F.Cu) (net 6) (tstamp 59C4A88C))
(segment (start 149.86 111.252) (end 144.78 111.252) (width 0.25) (layer F.Cu) (net 6) (tstamp 59C4A88D))
(segment (start 144.78 111.252) (end 144.018 110.49) (width 0.25) (layer F.Cu) (net 6) (tstamp 59C4A88F))
(segment (start 144.018 110.49) (end 140.97 110.49) (width 0.25) (layer F.Cu) (net 6) (tstamp 59C4A890))
(segment (start 151.0411 115.1636) (end 150.9776 115.1636) (width 0.25) (layer F.Cu) (net 8))
(segment (start 150.9776 115.1636) (end 149.86 114.046) (width 0.25) (layer F.Cu) (net 8) (tstamp 59C4A89C))
(segment (start 141.986 114.046) (end 140.97 113.03) (width 0.25) (layer F.Cu) (net 8) (tstamp 59C4A89F))
(segment (start 149.86 114.046) (end 141.986 114.046) (width 0.25) (layer F.Cu) (net 8) (tstamp 59C4A89D))
(segment (start 151.0411 105.0036) (end 150.9776 105.0036) (width 0.4) (layer F.Cu) (net 9))
(segment (start 150.9776 105.0036) (end 149.606 103.632) (width 0.4) (layer F.Cu) (net 9) (tstamp 59C4A8A9))
(segment (start 142.748 103.632) (end 140.97 105.41) (width 0.4) (layer F.Cu) (net 9) (tstamp 59C4A8AB))
(segment (start 149.606 103.632) (end 142.748 103.632) (width 0.4) (layer F.Cu) (net 9) (tstamp 59C4A8AA))
(segment (start 151.0411 107.5436) (end 151.0411 105.0036) (width 0.4) (layer F.Cu) (net 9))
(zone (net 4) (net_name "Net-(PI-GPIO1-Pad6)") (layer F.Cu) (tstamp 59C4A8A7) (hatch edge 0.508)
(connect_pads (clearance 0.508))
(min_thickness 0.254)
(fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
(polygon
(pts
(xy 130.302 102.108) (xy 130.302 118.11) (xy 154.94 117.856) (xy 155.194 101.854) (xy 130.302 102.108)
)
)
(filled_polygon
(pts
(xy 152.96 116.13) (xy 152.19245 116.13) (xy 152.454985 115.737089) (xy 152.569059 115.1636) (xy 152.454985 114.590111)
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(xy 141.619132 103.58)
)
)
)
) )

214
Serial-SHIM/Serial-SHIM.kicad_pcb-bak
View File

@ -1 +1,213 @@
(kicad_pcb (version 4) (host kicad "dummy file") ) (kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-stable)
(general
(links 5)
(no_connects 5)
(area 0 0 0 0)
(thickness 1.6)
(drawings 0)
(tracks 0)
(zones 0)
(modules 2)
(nets 10)
)
(page A4)
(title_block
(date 2017-09-21)
)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.6)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 "Net-(PI-GPIO1-Pad1)")
(net 2 "Net-(PI-GPIO1-Pad3)")
(net 3 "Net-(PI-GPIO1-Pad5)")
(net 4 "Net-(PI-GPIO1-Pad6)")
(net 5 "Net-(PI-GPIO1-Pad7)")
(net 6 "Net-(PI-GPIO1-Pad8)")
(net 7 "Net-(PI-GPIO1-Pad9)")
(net 8 "Net-(PI-GPIO1-Pad10)")
(net 9 +5V)
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +5V)
(add_net "Net-(PI-GPIO1-Pad1)")
(add_net "Net-(PI-GPIO1-Pad10)")
(add_net "Net-(PI-GPIO1-Pad3)")
(add_net "Net-(PI-GPIO1-Pad5)")
(add_net "Net-(PI-GPIO1-Pad6)")
(add_net "Net-(PI-GPIO1-Pad7)")
(add_net "Net-(PI-GPIO1-Pad8)")
(add_net "Net-(PI-GPIO1-Pad9)")
)
(module Pin_Headers:Pin_Header_Straight_2x05 (layer F.Cu) (tedit 59C3ECD4) (tstamp 59C3E9B3)
(at 161.29 105.41)
(descr "Through hole pin header")
(tags "pin header")
(path /59BCEAE4)
(fp_text reference PI-GPIO1 (at 1.27 12.7) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X05 (at -2.54 5.08 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 11.95) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 11.95) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 -1.27) (end 3.81 11.43) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 11.43) (end -1.27 11.43) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 11.43) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 1 "Net-(PI-GPIO1-Pad1)"))
(pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 +5V))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 2 "Net-(PI-GPIO1-Pad3)"))
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 +5V))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 3 "Net-(PI-GPIO1-Pad5)"))
(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 4 "Net-(PI-GPIO1-Pad6)"))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 5 "Net-(PI-GPIO1-Pad7)"))
(pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(PI-GPIO1-Pad8)"))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 7 "Net-(PI-GPIO1-Pad9)"))
(pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(PI-GPIO1-Pad10)"))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x05.wrl
(at (xyz 0.05 -0.2 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_1x04 (layer F.Cu) (tedit 59C3EC46) (tstamp 59C3E9C6)
(at 152.4 105.41)
(descr "Through hole pin header")
(tags "pin header")
(path /59BCE9F7)
(fp_text reference Serial1 (at 1.27 10.16) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_01X04 (at 2.54 3.81 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.75 -1.75) (end 1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 9.4) (end 1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end 1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 8.89) (end 1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 +5V))
(pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 4 "Net-(PI-GPIO1-Pad6)"))
(pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(PI-GPIO1-Pad8)"))
(pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(PI-GPIO1-Pad10)"))
(model Pin_Headers.3dshapes/Pin_Header_Straight_1x04.wrl
(at (xyz 0 -0.15 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
)

42
Serial-SHIM/Serial-SHIM.net
View File

@ -1,7 +1,7 @@
(export (version D) (export (version D)
(design (design
(source /home/arofarn/Make/Cameteo/Serial-SHIM/Serial-SHIM.sch) (source /home/arofarn/Make/Cameteo/Serial-SHIM/Serial-SHIM.sch)
(date "sam. 16 sept. 2017 11:36:59 CEST") (date "jeu. 21 sept. 2017 19:02:46 CEST")
(tool "Eeschema 4.0.2+dfsg1-stable") (tool "Eeschema 4.0.2+dfsg1-stable")
(sheet (number 1) (name /) (tstamps /) (sheet (number 1) (name /) (tstamps /)
(title_block (title_block
@ -17,7 +17,7 @@
(components (components
(comp (ref Serial1) (comp (ref Serial1)
(value CONN_01X04) (value CONN_01X04)
(footprint Pin_Headers:Pin_Header_Straight_1x04) (footprint Socket_Strips:Socket_Strip_Angled_1x04)
(libsource (lib conn) (part CONN_01X04)) (libsource (lib conn) (part CONN_01X04))
(sheetpath (names /) (tstamps /)) (sheetpath (names /) (tstamps /))
(tstamp 59BCE9F7)) (tstamp 59BCE9F7))
@ -68,26 +68,26 @@
(library (logical conn) (library (logical conn)
(uri /usr/share/kicad/library/conn.lib))) (uri /usr/share/kicad/library/conn.lib)))
(nets (nets
(net (code 1) (name "Net-(PI-GPIO1-Pad8)") (net (code 1) (name "Net-(PI-GPIO1-Pad10)")
(node (ref Serial1) (pin 3)) (node (ref Serial1) (pin 4))
(node (ref PI-GPIO1) (pin 8))) (node (ref PI-GPIO1) (pin 10)))
(net (code 2) (name "Net-(PI-GPIO1-Pad10)") (net (code 3) (name +5V)
(node (ref PI-GPIO1) (pin 10))
(node (ref Serial1) (pin 4)))
(net (code 4) (name 5V)
(node (ref Serial1) (pin 1))
(node (ref PI-GPIO1) (pin 4)) (node (ref PI-GPIO1) (pin 4))
(node (ref Serial1) (pin 1))
(node (ref PI-GPIO1) (pin 2))) (node (ref PI-GPIO1) (pin 2)))
(net (code 5) (name "Net-(PI-GPIO1-Pad6)") (net (code 4) (name "Net-(PI-GPIO1-Pad1)")
(node (ref PI-GPIO1) (pin 1)))
(net (code 5) (name "Net-(PI-GPIO1-Pad3)")
(node (ref PI-GPIO1) (pin 3)))
(net (code 6) (name "Net-(PI-GPIO1-Pad5)")
(node (ref PI-GPIO1) (pin 5)))
(net (code 7) (name "Net-(PI-GPIO1-Pad7)")
(node (ref PI-GPIO1) (pin 7)))
(net (code 8) (name "Net-(PI-GPIO1-Pad9)")
(node (ref PI-GPIO1) (pin 9)))
(net (code 9) (name "Net-(PI-GPIO1-Pad6)")
(node (ref Serial1) (pin 2)) (node (ref Serial1) (pin 2))
(node (ref PI-GPIO1) (pin 6))) (node (ref PI-GPIO1) (pin 6)))
(net (code 6) (name "Net-(PI-GPIO1-Pad1)") (net (code 10) (name "Net-(PI-GPIO1-Pad8)")
(node (ref PI-GPIO1) (pin 1))) (node (ref Serial1) (pin 3))
(net (code 7) (name "Net-(PI-GPIO1-Pad3)") (node (ref PI-GPIO1) (pin 8)))))
(node (ref PI-GPIO1) (pin 3)))
(net (code 8) (name "Net-(PI-GPIO1-Pad5)")
(node (ref PI-GPIO1) (pin 5)))
(net (code 9) (name "Net-(PI-GPIO1-Pad7)")
(node (ref PI-GPIO1) (pin 7)))
(net (code 10) (name "Net-(PI-GPIO1-Pad9)")
(node (ref PI-GPIO1) (pin 9)))))

69
Serial-SHIM/Serial-SHIM.sch
View File

@ -28,6 +28,7 @@ LIBS:opto
LIBS:atmel LIBS:atmel
LIBS:contrib LIBS:contrib
LIBS:valves LIBS:valves
LIBS:Serial-SHIM-cache
EELAYER 25 0 EELAYER 25 0
EELAYER END EELAYER END
$Descr A4 11693 8268 $Descr A4 11693 8268
@ -48,7 +49,7 @@ U 1 1 59BCE9F7
P 7850 4800 P 7850 4800
F 0 "Serial1" H 7850 5050 50 0000 C CNN F 0 "Serial1" H 7850 5050 50 0000 C CNN
F 1 "CONN_01X04" H 7950 4550 50 0000 C CNN F 1 "CONN_01X04" H 7950 4550 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x04" H 8450 5150 50 0000 C CNN F 2 "Socket_Strips:Socket_Strip_Angled_1x04" H 8450 5150 50 0000 C CNN
F 3 "" H 7850 4800 50 0000 C CNN F 3 "" H 7850 4800 50 0000 C CNN
1 7850 4800 1 7850 4800
1 0 0 -1 1 0 0 -1
@ -92,38 +93,68 @@ F 3 "" H 7300 4850 50 0000 C CNN
1 0 0 1 1 0 0 1
$EndComp $EndComp
$Comp $Comp
L +5V #PWR03 L +5V #PWR02
U 1 1 59BCF0FF U 1 1 59BCF0FF
P 7800 4050 P 7900 4000
F 0 "#PWR03" H 7800 3900 50 0001 C CNN F 0 "#PWR02" H 7900 3850 50 0001 C CNN
F 1 "+5V" H 7800 4190 50 0000 C CNN F 1 "+5V" H 7900 4140 50 0000 C CNN
F 2 "" H 7800 4050 50 0000 C CNN F 2 "" H 7900 4000 50 0000 C CNN
F 3 "" H 7800 4050 50 0000 C CNN F 3 "" H 7900 4000 50 0000 C CNN
1 7800 4050 1 7900 4000
1 0 0 -1 -1 0 0 1
$EndComp $EndComp
Text GLabel 7800 4050 2 60 Input ~ 0
5V
$Comp $Comp
L GND #PWR04 L GND #PWR03
U 1 1 59BCF11C U 1 1 59BCF11C
P 8300 4000 P 8300 4000
F 0 "#PWR04" H 8300 3750 50 0001 C CNN F 0 "#PWR03" H 8300 3750 50 0001 C CNN
F 1 "GND" H 8300 3850 50 0000 C CNN F 1 "GND" H 8300 3850 50 0000 C CNN
F 2 "" H 8300 4000 50 0000 C CNN F 2 "" H 8300 4000 50 0000 C CNN
F 3 "" H 8300 4000 50 0000 C CNN F 3 "" H 8300 4000 50 0000 C CNN
1 8300 4000 1 8300 4000
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
Text GLabel 8300 4000 2 60 Input ~ 0
Ground
Text GLabel 7150 4500 2 60 Input ~ 0
5V
Wire Wire Line
7150 4500 7000 4500
Wire Wire Line Wire Wire Line
7000 4500 7000 4750 7000 4500 7000 4750
Connection ~ 7000 4650 Connection ~ 7000 4650
Wire Wire Line Wire Wire Line
7000 4650 7650 4650 7000 4650 7650 4650
NoConn ~ 6500 4650
NoConn ~ 6500 4750
NoConn ~ 6500 4850
NoConn ~ 6500 4950
NoConn ~ 6500 5050
$Comp
L PWR_FLAG #FLG04
U 1 1 59C3E871
P 7900 4000
F 0 "#FLG04" H 7900 4095 50 0001 C CNN
F 1 "PWR_FLAG" H 7900 4180 50 0000 C CNN
F 2 "" H 7900 4000 50 0000 C CNN
F 3 "" H 7900 4000 50 0000 C CNN
1 7900 4000
1 0 0 -1
$EndComp
$Comp
L PWR_FLAG #FLG05
U 1 1 59C3E889
P 8300 4000
F 0 "#FLG05" H 8300 4095 50 0001 C CNN
F 1 "PWR_FLAG" H 8300 4180 50 0000 C CNN
F 2 "" H 8300 4000 50 0000 C CNN
F 3 "" H 8300 4000 50 0000 C CNN
1 8300 4000
1 0 0 -1
$EndComp
$Comp
L +5V #PWR06
U 1 1 59C3E8A7
P 7000 4500
F 0 "#PWR06" H 7000 4350 50 0001 C CNN
F 1 "+5V" H 7000 4640 50 0000 C CNN
F 2 "" H 7000 4500 50 0000 C CNN
F 3 "" H 7000 4500 50 0000 C CNN
1 7000 4500
1 0 0 -1
$EndComp
$EndSCHEMATC $EndSCHEMATC

44
Serial-SHIM/Serial-SHIM.xml
View File

@ -2,7 +2,7 @@
<export version="D"> <export version="D">
<design> <design>
<source>/home/arofarn/Make/Cameteo/Serial-SHIM/Serial-SHIM.sch</source> <source>/home/arofarn/Make/Cameteo/Serial-SHIM/Serial-SHIM.sch</source>
<date>sam. 16 sept. 2017 11:28:28 CEST</date> <date>jeu. 21 sept. 2017 18:27:42 CEST</date>
<tool>Eeschema 4.0.2+dfsg1-stable</tool> <tool>Eeschema 4.0.2+dfsg1-stable</tool>
<sheet number="1" name="/" tstamps="/"> <sheet number="1" name="/" tstamps="/">
<title_block> <title_block>
@ -21,12 +21,14 @@
<components> <components>
<comp ref="Serial1"> <comp ref="Serial1">
<value>CONN_01X04</value> <value>CONN_01X04</value>
<footprint>Pin_Headers:Pin_Header_Straight_1x04</footprint>
<libsource lib="conn" part="CONN_01X04"/> <libsource lib="conn" part="CONN_01X04"/>
<sheetpath names="/" tstamps="/"/> <sheetpath names="/" tstamps="/"/>
<tstamp>59BCE9F7</tstamp> <tstamp>59BCE9F7</tstamp>
</comp> </comp>
<comp ref="PI-GPIO1"> <comp ref="PI-GPIO1">
<value>CONN_02X05</value> <value>CONN_02X05</value>
<footprint>Pin_Headers:Pin_Header_Straight_2x05</footprint>
<libsource lib="conn" part="CONN_02X05"/> <libsource lib="conn" part="CONN_02X05"/>
<sheetpath names="/" tstamps="/"/> <sheetpath names="/" tstamps="/"/>
<tstamp>59BCEAE4</tstamp> <tstamp>59BCEAE4</tstamp>
@ -84,37 +86,37 @@
</library> </library>
</libraries> </libraries>
<nets> <nets>
<net code="1" name="Ground"> <net code="1" name="Net-(PI-GPIO1-Pad10)">
<node ref="PI-GPIO1" pin="9"/> <node ref="Serial1" pin="4"/>
<node ref="PI-GPIO1" pin="10"/>
</net> </net>
<net code="2" name="SDA"> <net code="3" name="+5V">
<node ref="PI-GPIO1" pin="3"/>
</net>
<net code="3" name="SDC">
<node ref="PI-GPIO1" pin="5"/>
</net>
<net code="4" name="GPCLK0">
<node ref="PI-GPIO1" pin="7"/>
</net>
<net code="5" name="5V">
<node ref="Serial1" pin="1"/>
<node ref="PI-GPIO1" pin="4"/> <node ref="PI-GPIO1" pin="4"/>
<node ref="Serial1" pin="1"/>
<node ref="PI-GPIO1" pin="2"/> <node ref="PI-GPIO1" pin="2"/>
</net> </net>
<net code="6" name="3_3V"> <net code="4" name="Net-(PI-GPIO1-Pad1)">
<node ref="PI-GPIO1" pin="1"/> <node ref="PI-GPIO1" pin="1"/>
</net> </net>
<net code="7" name="Net-(PI-GPIO1-Pad6)"> <net code="5" name="Net-(PI-GPIO1-Pad3)">
<node ref="PI-GPIO1" pin="3"/>
</net>
<net code="6" name="Net-(PI-GPIO1-Pad5)">
<node ref="PI-GPIO1" pin="5"/>
</net>
<net code="7" name="Net-(PI-GPIO1-Pad7)">
<node ref="PI-GPIO1" pin="7"/>
</net>
<net code="8" name="Net-(PI-GPIO1-Pad9)">
<node ref="PI-GPIO1" pin="9"/>
</net>
<net code="9" name="Net-(PI-GPIO1-Pad6)">
<node ref="Serial1" pin="2"/> <node ref="Serial1" pin="2"/>
<node ref="PI-GPIO1" pin="6"/> <node ref="PI-GPIO1" pin="6"/>
</net> </net>
<net code="8" name="Net-(PI-GPIO1-Pad8)"> <net code="10" name="Net-(PI-GPIO1-Pad8)">
<node ref="Serial1" pin="3"/> <node ref="Serial1" pin="3"/>
<node ref="PI-GPIO1" pin="8"/> <node ref="PI-GPIO1" pin="8"/>
</net> </net>
<net code="9" name="Net-(PI-GPIO1-Pad10)">
<node ref="PI-GPIO1" pin="10"/>
<node ref="Serial1" pin="4"/>
</net>
</nets> </nets>
</export> </export>