2017-10-01 09:03:08 +02:00
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(kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-stable)
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(general
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(links 5)
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(no_connects 5)
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(area 0 0 0 0)
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(thickness 1.6)
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(drawings 0)
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(tracks 0)
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(zones 0)
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(modules 2)
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(nets 10)
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(page A4)
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(title_block
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(date 2017-09-21)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(segment_width 0.2)
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(edge_width 0.15)
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(via_size 0.6)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.2)
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(aux_axis_origin 0 0)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x00030_80000001)
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(usegerberextensions false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15)
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(hpglpenoverlay 2)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net 1 "Net-(PI-GPIO1-Pad1)")
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(net 2 "Net-(PI-GPIO1-Pad3)")
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(net 3 "Net-(PI-GPIO1-Pad5)")
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(net 4 "Net-(PI-GPIO1-Pad6)")
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(net 5 "Net-(PI-GPIO1-Pad7)")
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(net 6 "Net-(PI-GPIO1-Pad8)")
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(net 7 "Net-(PI-GPIO1-Pad9)")
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(net 8 "Net-(PI-GPIO1-Pad10)")
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(net 9 +5V)
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.6)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net +5V)
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(add_net "Net-(PI-GPIO1-Pad1)")
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(add_net "Net-(PI-GPIO1-Pad10)")
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(add_net "Net-(PI-GPIO1-Pad3)")
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(add_net "Net-(PI-GPIO1-Pad5)")
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(add_net "Net-(PI-GPIO1-Pad6)")
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(add_net "Net-(PI-GPIO1-Pad7)")
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(add_net "Net-(PI-GPIO1-Pad8)")
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(add_net "Net-(PI-GPIO1-Pad9)")
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)
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(module Pin_Headers:Pin_Header_Straight_2x05 (layer F.Cu) (tedit 59C3ECD4) (tstamp 59C3E9B3)
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(at 161.29 105.41)
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(descr "Through hole pin header")
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(tags "pin header")
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(path /59BCEAE4)
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(fp_text reference PI-GPIO1 (at 1.27 12.7) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value CONN_02X05 (at -2.54 5.08 90) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -1.75 -1.75) (end -1.75 11.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 4.3 -1.75) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 11.95) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 3.81 -1.27) (end 3.81 11.43) (layer F.SilkS) (width 0.15))
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(fp_line (start 3.81 11.43) (end -1.27 11.43) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.27 11.43) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
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(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 1 "Net-(PI-GPIO1-Pad1)"))
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(pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 9 +5V))
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(pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 2 "Net-(PI-GPIO1-Pad3)"))
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(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 9 +5V))
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(pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 3 "Net-(PI-GPIO1-Pad5)"))
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(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 4 "Net-(PI-GPIO1-Pad6)"))
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(pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 5 "Net-(PI-GPIO1-Pad7)"))
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(pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 6 "Net-(PI-GPIO1-Pad8)"))
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(pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 7 "Net-(PI-GPIO1-Pad9)"))
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(pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 8 "Net-(PI-GPIO1-Pad10)"))
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(model Pin_Headers.3dshapes/Pin_Header_Straight_2x05.wrl
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(at (xyz 0.05 -0.2 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 90))
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)
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)
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(module Pin_Headers:Pin_Header_Straight_1x04 (layer F.Cu) (tedit 59C3EC46) (tstamp 59C3E9C6)
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(at 152.4 105.41)
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(descr "Through hole pin header")
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(tags "pin header")
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(path /59BCE9F7)
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(fp_text reference Serial1 (at 1.27 10.16) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value CONN_01X04 (at 2.54 3.81 90) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.75 -1.75) (end 1.75 9.4) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.75 9.4) (end 1.75 9.4) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 1.27) (end 1.27 8.89) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.27 8.89) (end 1.27 8.89) (layer F.SilkS) (width 0.15))
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(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
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(fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
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(pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 9 +5V))
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(pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 4 "Net-(PI-GPIO1-Pad6)"))
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(pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 6 "Net-(PI-GPIO1-Pad8)"))
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(pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 8 "Net-(PI-GPIO1-Pad10)"))
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(model Pin_Headers.3dshapes/Pin_Header_Straight_1x04.wrl
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(at (xyz 0 -0.15 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 90))
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)
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)
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)
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