214 lines
7.5 KiB
Plaintext
214 lines
7.5 KiB
Plaintext
(kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-stable)
|
|
|
|
(general
|
|
(links 5)
|
|
(no_connects 5)
|
|
(area 0 0 0 0)
|
|
(thickness 1.6)
|
|
(drawings 0)
|
|
(tracks 0)
|
|
(zones 0)
|
|
(modules 2)
|
|
(nets 10)
|
|
)
|
|
|
|
(page A4)
|
|
(title_block
|
|
(date 2017-09-21)
|
|
)
|
|
|
|
(layers
|
|
(0 F.Cu signal)
|
|
(31 B.Cu signal)
|
|
(32 B.Adhes user)
|
|
(33 F.Adhes user)
|
|
(34 B.Paste user)
|
|
(35 F.Paste user)
|
|
(36 B.SilkS user)
|
|
(37 F.SilkS user)
|
|
(38 B.Mask user)
|
|
(39 F.Mask user)
|
|
(40 Dwgs.User user)
|
|
(41 Cmts.User user)
|
|
(42 Eco1.User user)
|
|
(43 Eco2.User user)
|
|
(44 Edge.Cuts user)
|
|
(45 Margin user)
|
|
(46 B.CrtYd user)
|
|
(47 F.CrtYd user)
|
|
(48 B.Fab user)
|
|
(49 F.Fab user)
|
|
)
|
|
|
|
(setup
|
|
(last_trace_width 0.25)
|
|
(trace_clearance 0.2)
|
|
(zone_clearance 0.508)
|
|
(zone_45_only no)
|
|
(trace_min 0.2)
|
|
(segment_width 0.2)
|
|
(edge_width 0.15)
|
|
(via_size 0.6)
|
|
(via_drill 0.4)
|
|
(via_min_size 0.4)
|
|
(via_min_drill 0.3)
|
|
(uvia_size 0.3)
|
|
(uvia_drill 0.1)
|
|
(uvias_allowed no)
|
|
(uvia_min_size 0.2)
|
|
(uvia_min_drill 0.1)
|
|
(pcb_text_width 0.3)
|
|
(pcb_text_size 1.5 1.5)
|
|
(mod_edge_width 0.15)
|
|
(mod_text_size 1 1)
|
|
(mod_text_width 0.15)
|
|
(pad_size 1.524 1.524)
|
|
(pad_drill 0.762)
|
|
(pad_to_mask_clearance 0.2)
|
|
(aux_axis_origin 0 0)
|
|
(visible_elements FFFFFF7F)
|
|
(pcbplotparams
|
|
(layerselection 0x00030_80000001)
|
|
(usegerberextensions false)
|
|
(excludeedgelayer true)
|
|
(linewidth 0.100000)
|
|
(plotframeref false)
|
|
(viasonmask false)
|
|
(mode 1)
|
|
(useauxorigin false)
|
|
(hpglpennumber 1)
|
|
(hpglpenspeed 20)
|
|
(hpglpendiameter 15)
|
|
(hpglpenoverlay 2)
|
|
(psnegative false)
|
|
(psa4output false)
|
|
(plotreference true)
|
|
(plotvalue true)
|
|
(plotinvisibletext false)
|
|
(padsonsilk false)
|
|
(subtractmaskfromsilk false)
|
|
(outputformat 1)
|
|
(mirror false)
|
|
(drillshape 1)
|
|
(scaleselection 1)
|
|
(outputdirectory ""))
|
|
)
|
|
|
|
(net 0 "")
|
|
(net 1 "Net-(PI-GPIO1-Pad1)")
|
|
(net 2 "Net-(PI-GPIO1-Pad3)")
|
|
(net 3 "Net-(PI-GPIO1-Pad5)")
|
|
(net 4 "Net-(PI-GPIO1-Pad6)")
|
|
(net 5 "Net-(PI-GPIO1-Pad7)")
|
|
(net 6 "Net-(PI-GPIO1-Pad8)")
|
|
(net 7 "Net-(PI-GPIO1-Pad9)")
|
|
(net 8 "Net-(PI-GPIO1-Pad10)")
|
|
(net 9 +5V)
|
|
|
|
(net_class Default "This is the default net class."
|
|
(clearance 0.2)
|
|
(trace_width 0.25)
|
|
(via_dia 0.6)
|
|
(via_drill 0.4)
|
|
(uvia_dia 0.3)
|
|
(uvia_drill 0.1)
|
|
(add_net +5V)
|
|
(add_net "Net-(PI-GPIO1-Pad1)")
|
|
(add_net "Net-(PI-GPIO1-Pad10)")
|
|
(add_net "Net-(PI-GPIO1-Pad3)")
|
|
(add_net "Net-(PI-GPIO1-Pad5)")
|
|
(add_net "Net-(PI-GPIO1-Pad6)")
|
|
(add_net "Net-(PI-GPIO1-Pad7)")
|
|
(add_net "Net-(PI-GPIO1-Pad8)")
|
|
(add_net "Net-(PI-GPIO1-Pad9)")
|
|
)
|
|
|
|
(module Pin_Headers:Pin_Header_Straight_2x05 (layer F.Cu) (tedit 59C3ECD4) (tstamp 59C3E9B3)
|
|
(at 161.29 105.41)
|
|
(descr "Through hole pin header")
|
|
(tags "pin header")
|
|
(path /59BCEAE4)
|
|
(fp_text reference PI-GPIO1 (at 1.27 12.7) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value CONN_02X05 (at -2.54 5.08 90) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_line (start -1.75 -1.75) (end -1.75 11.95) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 4.3 -1.75) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.75 11.95) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 3.81 -1.27) (end 3.81 11.43) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start 3.81 11.43) (end -1.27 11.43) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start -1.27 11.43) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
|
|
(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 1 "Net-(PI-GPIO1-Pad1)"))
|
|
(pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 9 +5V))
|
|
(pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 2 "Net-(PI-GPIO1-Pad3)"))
|
|
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 9 +5V))
|
|
(pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 3 "Net-(PI-GPIO1-Pad5)"))
|
|
(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 4 "Net-(PI-GPIO1-Pad6)"))
|
|
(pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 5 "Net-(PI-GPIO1-Pad7)"))
|
|
(pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 6 "Net-(PI-GPIO1-Pad8)"))
|
|
(pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 7 "Net-(PI-GPIO1-Pad9)"))
|
|
(pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 8 "Net-(PI-GPIO1-Pad10)"))
|
|
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x05.wrl
|
|
(at (xyz 0.05 -0.2 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 90))
|
|
)
|
|
)
|
|
|
|
(module Pin_Headers:Pin_Header_Straight_1x04 (layer F.Cu) (tedit 59C3EC46) (tstamp 59C3E9C6)
|
|
(at 152.4 105.41)
|
|
(descr "Through hole pin header")
|
|
(tags "pin header")
|
|
(path /59BCE9F7)
|
|
(fp_text reference Serial1 (at 1.27 10.16) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value CONN_01X04 (at 2.54 3.81 90) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 1.75 -1.75) (end 1.75 9.4) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.75 9.4) (end 1.75 9.4) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start 1.27 1.27) (end 1.27 8.89) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start -1.27 8.89) (end 1.27 8.89) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
|
|
(fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
|
|
(pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 9 +5V))
|
|
(pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 4 "Net-(PI-GPIO1-Pad6)"))
|
|
(pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 6 "Net-(PI-GPIO1-Pad8)"))
|
|
(pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
|
|
(net 8 "Net-(PI-GPIO1-Pad10)"))
|
|
(model Pin_Headers.3dshapes/Pin_Header_Straight_1x04.wrl
|
|
(at (xyz 0 -0.15 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 90))
|
|
)
|
|
)
|
|
|
|
)
|