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Rename and order parts folder

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This commit is contained in:
Pierrick C
2018-07-28 18:49:57 +02:00
parent 01ed6e1658
commit 432165454c
18 changed files with 1 additions and 1 deletions
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109
parts/electronic/Serial-SHIM/Serial-SHIM-cache.lib Normal file
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# +5V
#
DEF +5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# CONN_01X04
#
DEF CONN_01X04 P 0 40 Y N 1 F N
F0 "P" 0 250 50 H V C CNN
F1 "CONN_01X04" 100 0 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Pin_Header_Straight_1X04
Pin_Header_Angled_1X04
Socket_Strip_Straight_1X04
Socket_Strip_Angled_1X04
$ENDFPLIST
DRAW
S -50 -145 10 -155 0 1 0 N
S -50 -45 10 -55 0 1 0 N
S -50 55 10 45 0 1 0 N
S -50 155 10 145 0 1 0 N
S -50 200 50 -200 0 1 0 N
X P1 1 -200 150 150 R 50 50 1 1 P
X P2 2 -200 50 150 R 50 50 1 1 P
X P3 3 -200 -50 150 R 50 50 1 1 P
X P4 4 -200 -150 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_02X05
#
DEF CONN_02X05 P 0 1 Y N 1 F N
F0 "P" 0 300 50 H V C CNN
F1 "CONN_02X05" 0 -300 50 H V C CNN
F2 "" 0 -1200 50 H V C CNN
F3 "" 0 -1200 50 H V C CNN
$FPLIST
Pin_Header_Straight_2X05
Pin_Header_Angled_2X05
Socket_Strip_Straight_2X05
Socket_Strip_Angled_2X05
$ENDFPLIST
DRAW
S -100 -195 -50 -205 0 1 0 N
S -100 -95 -50 -105 0 1 0 N
S -100 5 -50 -5 0 1 0 N
S -100 105 -50 95 0 1 0 N
S -100 205 -50 195 0 1 0 N
S -100 250 100 -250 0 1 0 N
S 50 -195 100 -205 0 1 0 N
S 50 -95 100 -105 0 1 0 N
S 50 5 100 -5 0 1 0 N
S 50 105 100 95 0 1 0 N
S 50 205 100 195 0 1 0 N
X P1 1 -250 200 150 R 50 50 1 1 P
X P2 2 250 200 150 L 50 50 1 1 P
X P3 3 -250 100 150 R 50 50 1 1 P
X P4 4 250 100 150 L 50 50 1 1 P
X P5 5 -250 0 150 R 50 50 1 1 P
X P6 6 250 0 150 L 50 50 1 1 P
X P7 7 -250 -100 150 R 50 50 1 1 P
X P8 8 250 -100 150 L 50 50 1 1 P
X P9 9 -250 -200 150 R 50 50 1 1 P
X P10 10 250 -200 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# PWR_FLAG
#
DEF PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 95 50 H I C CNN
F1 "PWR_FLAG" 0 180 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
X pwr 1 0 0 0 U 50 50 0 0 w
P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
ENDDRAW
ENDDEF
#
#End Library

160
parts/electronic/Serial-SHIM/Serial-SHIM.bak Normal file
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EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:Serial-SHIM-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_01X04 Serial1
U 1 1 59BCE9F7
P 7850 4800
F 0 "Serial1" H 7850 5050 50 0000 C CNN
F 1 "CONN_01X04" H 7950 4550 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x04" H 8450 5150 50 0000 C CNN
F 3 "" H 7850 4800 50 0000 C CNN
1 7850 4800
1 0 0 -1
$EndComp
$Comp
L CONN_02X05 PI-GPIO1
U 1 1 59BCEAE4
P 6750 4850
F 0 "PI-GPIO1" H 6750 5150 50 0000 C CNN
F 1 "CONN_02X05" H 6750 4550 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x05" H 6200 5250 50 0000 C CNN
F 3 "" H 6750 3650 50 0000 C CNN
1 6750 4850
1 0 0 -1
$EndComp
Wire Wire Line
7000 4850 7550 4850
Wire Wire Line
7550 4850 7550 4750
Wire Wire Line
7550 4750 7650 4750
Wire Wire Line
7000 4950 7600 4950
Wire Wire Line
7600 4950 7600 4850
Wire Wire Line
7600 4850 7650 4850
Wire Wire Line
7000 5050 7650 5050
Wire Wire Line
7650 5050 7650 4950
$Comp
L GND #PWR01
U 1 1 59BCEDDF
P 7300 4850
F 0 "#PWR01" H 7300 4600 50 0001 C CNN
F 1 "GND" H 7300 4700 50 0000 C CNN
F 2 "" H 7300 4850 50 0000 C CNN
F 3 "" H 7300 4850 50 0000 C CNN
1 7300 4850
1 0 0 1
$EndComp
$Comp
L +5V #PWR02
U 1 1 59BCF0FF
P 7900 4000
F 0 "#PWR02" H 7900 3850 50 0001 C CNN
F 1 "+5V" H 7900 4140 50 0000 C CNN
F 2 "" H 7900 4000 50 0000 C CNN
F 3 "" H 7900 4000 50 0000 C CNN
1 7900 4000
-1 0 0 1
$EndComp
$Comp
L GND #PWR03
U 1 1 59BCF11C
P 8300 4000
F 0 "#PWR03" H 8300 3750 50 0001 C CNN
F 1 "GND" H 8300 3850 50 0000 C CNN
F 2 "" H 8300 4000 50 0000 C CNN
F 3 "" H 8300 4000 50 0000 C CNN
1 8300 4000
1 0 0 -1
$EndComp
Wire Wire Line
7000 4500 7000 4750
Connection ~ 7000 4650
Wire Wire Line
7000 4650 7650 4650
NoConn ~ 6500 4650
NoConn ~ 6500 4750
NoConn ~ 6500 4850
NoConn ~ 6500 4950
NoConn ~ 6500 5050
$Comp
L PWR_FLAG #FLG04
U 1 1 59C3E871
P 7900 4000
F 0 "#FLG04" H 7900 4095 50 0001 C CNN
F 1 "PWR_FLAG" H 7900 4180 50 0000 C CNN
F 2 "" H 7900 4000 50 0000 C CNN
F 3 "" H 7900 4000 50 0000 C CNN
1 7900 4000
1 0 0 -1
$EndComp
$Comp
L PWR_FLAG #FLG05
U 1 1 59C3E889
P 8300 4000
F 0 "#FLG05" H 8300 4095 50 0001 C CNN
F 1 "PWR_FLAG" H 8300 4180 50 0000 C CNN
F 2 "" H 8300 4000 50 0000 C CNN
F 3 "" H 8300 4000 50 0000 C CNN
1 8300 4000
1 0 0 -1
$EndComp
$Comp
L +5V #PWR06
U 1 1 59C3E8A7
P 7000 4500
F 0 "#PWR06" H 7000 4350 50 0001 C CNN
F 1 "+5V" H 7000 4640 50 0000 C CNN
F 2 "" H 7000 4500 50 0000 C CNN
F 3 "" H 7000 4500 50 0000 C CNN
1 7000 4500
1 0 0 -1
$EndComp
$EndSCHEMATC

299
parts/electronic/Serial-SHIM/Serial-SHIM.kicad_pcb Normal file
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(kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-stable)
(general
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(no_connects 1)
(area 0 0 0 0)
(thickness 1.6)
(drawings 4)
(tracks 14)
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(modules 2)
(nets 10)
)
(page A4)
(title_block
(date 2017-09-21)
)
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(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
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(39 F.Mask user)
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(41 Cmts.User user)
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(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
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(via_min_size 0.4)
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(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 129.54 118.11)
(grid_origin 129.54 118.11)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 "Net-(PI-GPIO1-Pad1)")
(net 2 "Net-(PI-GPIO1-Pad3)")
(net 3 "Net-(PI-GPIO1-Pad5)")
(net 4 "Net-(PI-GPIO1-Pad6)")
(net 5 "Net-(PI-GPIO1-Pad7)")
(net 6 "Net-(PI-GPIO1-Pad8)")
(net 7 "Net-(PI-GPIO1-Pad9)")
(net 8 "Net-(PI-GPIO1-Pad10)")
(net 9 +5V)
(net_class Default "This is the default net class."
(clearance 0.1)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net "Net-(PI-GPIO1-Pad1)")
(add_net "Net-(PI-GPIO1-Pad10)")
(add_net "Net-(PI-GPIO1-Pad3)")
(add_net "Net-(PI-GPIO1-Pad5)")
(add_net "Net-(PI-GPIO1-Pad6)")
(add_net "Net-(PI-GPIO1-Pad7)")
(add_net "Net-(PI-GPIO1-Pad8)")
(add_net "Net-(PI-GPIO1-Pad9)")
)
(net_class PWR ""
(clearance 0.15)
(trace_width 0.4)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +5V)
)
(module Pin_Headers:Pin_Header_Straight_2x05 (layer F.Cu) (tedit 59C3F72F) (tstamp 59C4A79A)
(at 148.5011 105.0036)
(descr "Through hole pin header")
(tags "pin header")
(path /59BCEAE4)
(fp_text reference PI-GPIO1 (at -4.9911 10.5664) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X05 (at -2.4511 4.2164 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 11.95) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 11.95) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 -1.27) (end 3.81 11.43) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 11.43) (end -1.27 11.43) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 11.43) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 1 "Net-(PI-GPIO1-Pad1)"))
(pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
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(net 2 "Net-(PI-GPIO1-Pad3)"))
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 +5V))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 3 "Net-(PI-GPIO1-Pad5)"))
(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 4 "Net-(PI-GPIO1-Pad6)"))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 5 "Net-(PI-GPIO1-Pad7)"))
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(net 6 "Net-(PI-GPIO1-Pad8)"))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 7 "Net-(PI-GPIO1-Pad9)"))
(pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(PI-GPIO1-Pad10)"))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x05.wrl
(at (xyz 0.05 -0.2 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Socket_Strips:Socket_Strip_Angled_1x04 (layer F.Cu) (tedit 59C3F728) (tstamp 59C4A7A2)
(at 140.97 105.41 270)
(descr "Through hole socket strip")
(tags "socket strip")
(path /59BCE9F7)
(fp_text reference Serial1 (at 10.16 7.62 360) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_01X04 (at 3.81 -2.54 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
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(fp_line (start 9.4 -1.5) (end 9.4 10.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.5) (end 9.4 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 10.6) (end 9.4 10.6) (layer F.CrtYd) (width 0.05))
(fp_line (start 8.89 10.1) (end 8.89 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 6.35 10.1) (end 8.89 10.1) (layer F.SilkS) (width 0.15))
(fp_line (start 6.35 1.27) (end 8.89 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 1.27) (end 6.35 1.27) (layer F.SilkS) (width 0.15))
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(fp_line (start 3.81 10.1) (end 3.81 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 10.1) (end 3.81 10.1) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end 1.27 10.1) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end 3.81 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.4) (end -1.55 -1.4) (layer F.SilkS) (width 0.15))
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(net 6 "Net-(PI-GPIO1-Pad8)"))
(pad 4 thru_hole oval (at 7.62 0 270) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(PI-GPIO1-Pad10)"))
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(at (xyz 0.15 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(gr_line (start 130.81 102.87) (end 130.81 116.84) (angle 90) (layer Edge.Cuts) (width 0.15))
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(segment (start 149.86 111.252) (end 144.78 111.252) (width 0.25) (layer F.Cu) (net 6) (tstamp 59C4A88D))
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(segment (start 149.86 114.046) (end 141.986 114.046) (width 0.25) (layer F.Cu) (net 8) (tstamp 59C4A89D))
(segment (start 151.0411 105.0036) (end 150.9776 105.0036) (width 0.4) (layer F.Cu) (net 9))
(segment (start 150.9776 105.0036) (end 149.606 103.632) (width 0.4) (layer F.Cu) (net 9) (tstamp 59C4A8A9))
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(segment (start 149.606 103.632) (end 142.748 103.632) (width 0.4) (layer F.Cu) (net 9) (tstamp 59C4A8AA))
(segment (start 151.0411 107.5436) (end 151.0411 105.0036) (width 0.4) (layer F.Cu) (net 9))
(zone (net 4) (net_name "Net-(PI-GPIO1-Pad6)") (layer F.Cu) (tstamp 59C4A8A7) (hatch edge 0.508)
(connect_pads (clearance 0.508))
(min_thickness 0.254)
(fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
(polygon
(pts
(xy 130.302 102.108) (xy 130.302 118.11) (xy 154.94 117.856) (xy 155.194 101.854) (xy 130.302 102.108)
)
)
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213
parts/electronic/Serial-SHIM/Serial-SHIM.kicad_pcb-bak Normal file
View File

@ -0,0 +1,213 @@
(kicad_pcb (version 4) (host pcbnew 4.0.2+dfsg1-stable)
(general
(links 5)
(no_connects 5)
(area 0 0 0 0)
(thickness 1.6)
(drawings 0)
(tracks 0)
(zones 0)
(modules 2)
(nets 10)
)
(page A4)
(title_block
(date 2017-09-21)
)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.6)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 "Net-(PI-GPIO1-Pad1)")
(net 2 "Net-(PI-GPIO1-Pad3)")
(net 3 "Net-(PI-GPIO1-Pad5)")
(net 4 "Net-(PI-GPIO1-Pad6)")
(net 5 "Net-(PI-GPIO1-Pad7)")
(net 6 "Net-(PI-GPIO1-Pad8)")
(net 7 "Net-(PI-GPIO1-Pad9)")
(net 8 "Net-(PI-GPIO1-Pad10)")
(net 9 +5V)
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +5V)
(add_net "Net-(PI-GPIO1-Pad1)")
(add_net "Net-(PI-GPIO1-Pad10)")
(add_net "Net-(PI-GPIO1-Pad3)")
(add_net "Net-(PI-GPIO1-Pad5)")
(add_net "Net-(PI-GPIO1-Pad6)")
(add_net "Net-(PI-GPIO1-Pad7)")
(add_net "Net-(PI-GPIO1-Pad8)")
(add_net "Net-(PI-GPIO1-Pad9)")
)
(module Pin_Headers:Pin_Header_Straight_2x05 (layer F.Cu) (tedit 59C3ECD4) (tstamp 59C3E9B3)
(at 161.29 105.41)
(descr "Through hole pin header")
(tags "pin header")
(path /59BCEAE4)
(fp_text reference PI-GPIO1 (at 1.27 12.7) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X05 (at -2.54 5.08 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 11.95) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 11.95) (end 4.3 11.95) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 -1.27) (end 3.81 11.43) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 11.43) (end -1.27 11.43) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 11.43) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 1 "Net-(PI-GPIO1-Pad1)"))
(pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 +5V))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 2 "Net-(PI-GPIO1-Pad3)"))
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 +5V))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 3 "Net-(PI-GPIO1-Pad5)"))
(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 4 "Net-(PI-GPIO1-Pad6)"))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 5 "Net-(PI-GPIO1-Pad7)"))
(pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(PI-GPIO1-Pad8)"))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 7 "Net-(PI-GPIO1-Pad9)"))
(pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(PI-GPIO1-Pad10)"))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x05.wrl
(at (xyz 0.05 -0.2 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
(module Pin_Headers:Pin_Header_Straight_1x04 (layer F.Cu) (tedit 59C3EC46) (tstamp 59C3E9C6)
(at 152.4 105.41)
(descr "Through hole pin header")
(tags "pin header")
(path /59BCE9F7)
(fp_text reference Serial1 (at 1.27 10.16) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_01X04 (at 2.54 3.81 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.75 -1.75) (end 1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 9.4) (end 1.75 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 1.27) (end -1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end 1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 8.89) (end 1.27 8.89) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 9 +5V))
(pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 4 "Net-(PI-GPIO1-Pad6)"))
(pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 6 "Net-(PI-GPIO1-Pad8)"))
(pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(PI-GPIO1-Pad10)"))
(model Pin_Headers.3dshapes/Pin_Header_Straight_1x04.wrl
(at (xyz 0 -0.15 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
)
)
)

93
parts/electronic/Serial-SHIM/Serial-SHIM.net Normal file
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@ -0,0 +1,93 @@
(export (version D)
(design
(source /home/arofarn/Make/Cameteo/Serial-SHIM/Serial-SHIM.sch)
(date "jeu. 21 sept. 2017 19:02:46 CEST")
(tool "Eeschema 4.0.2+dfsg1-stable")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
(company)
(rev)
(date)
(source Serial-SHIM.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref Serial1)
(value CONN_01X04)
(footprint Socket_Strips:Socket_Strip_Angled_1x04)
(libsource (lib conn) (part CONN_01X04))
(sheetpath (names /) (tstamps /))
(tstamp 59BCE9F7))
(comp (ref PI-GPIO1)
(value CONN_02X05)
(footprint Pin_Headers:Pin_Header_Straight_2x05)
(libsource (lib conn) (part CONN_02X05))
(sheetpath (names /) (tstamps /))
(tstamp 59BCEAE4)))
(libparts
(libpart (lib conn) (part CONN_01X04)
(description "Connector 01x04")
(footprints
(fp Pin_Header_Straight_1X04)
(fp Pin_Header_Angled_1X04)
(fp Socket_Strip_Straight_1X04)
(fp Socket_Strip_Angled_1X04))
(fields
(field (name Reference) P)
(field (name Value) CONN_01X04))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
(pin (num 3) (name P3) (type passive))
(pin (num 4) (name P4) (type passive))))
(libpart (lib conn) (part CONN_02X05)
(description "Connector 02x05")
(footprints
(fp Pin_Header_Straight_2X05)
(fp Pin_Header_Angled_2X05)
(fp Socket_Strip_Straight_2X05)
(fp Socket_Strip_Angled_2X05))
(fields
(field (name Reference) P)
(field (name Value) CONN_02X05))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
(pin (num 3) (name P3) (type passive))
(pin (num 4) (name P4) (type passive))
(pin (num 5) (name P5) (type passive))
(pin (num 6) (name P6) (type passive))
(pin (num 7) (name P7) (type passive))
(pin (num 8) (name P8) (type passive))
(pin (num 9) (name P9) (type passive))
(pin (num 10) (name P10) (type passive)))))
(libraries
(library (logical conn)
(uri /usr/share/kicad/library/conn.lib)))
(nets
(net (code 1) (name "Net-(PI-GPIO1-Pad10)")
(node (ref Serial1) (pin 4))
(node (ref PI-GPIO1) (pin 10)))
(net (code 3) (name +5V)
(node (ref PI-GPIO1) (pin 4))
(node (ref Serial1) (pin 1))
(node (ref PI-GPIO1) (pin 2)))
(net (code 4) (name "Net-(PI-GPIO1-Pad1)")
(node (ref PI-GPIO1) (pin 1)))
(net (code 5) (name "Net-(PI-GPIO1-Pad3)")
(node (ref PI-GPIO1) (pin 3)))
(net (code 6) (name "Net-(PI-GPIO1-Pad5)")
(node (ref PI-GPIO1) (pin 5)))
(net (code 7) (name "Net-(PI-GPIO1-Pad7)")
(node (ref PI-GPIO1) (pin 7)))
(net (code 8) (name "Net-(PI-GPIO1-Pad9)")
(node (ref PI-GPIO1) (pin 9)))
(net (code 9) (name "Net-(PI-GPIO1-Pad6)")
(node (ref Serial1) (pin 2))
(node (ref PI-GPIO1) (pin 6)))
(net (code 10) (name "Net-(PI-GPIO1-Pad8)")
(node (ref Serial1) (pin 3))
(node (ref PI-GPIO1) (pin 8)))))

60
parts/electronic/Serial-SHIM/Serial-SHIM.pro Normal file
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@ -0,0 +1,60 @@
update=sam. 16 sept. 2017 11:07:04 CEST
version=1
last_client=kicad
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=digital-audio
LibName22=philips
LibName23=display
LibName24=cypress
LibName25=siliconi
LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves
[general]
version=1

160
parts/electronic/Serial-SHIM/Serial-SHIM.sch Normal file
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@ -0,0 +1,160 @@
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:Serial-SHIM-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L CONN_01X04 Serial1
U 1 1 59BCE9F7
P 7850 4800
F 0 "Serial1" H 7850 5050 50 0000 C CNN
F 1 "CONN_01X04" H 7950 4550 50 0000 C CNN
F 2 "Socket_Strips:Socket_Strip_Angled_1x04" H 8450 5150 50 0000 C CNN
F 3 "" H 7850 4800 50 0000 C CNN
1 7850 4800
1 0 0 -1
$EndComp
$Comp
L CONN_02X05 PI-GPIO1
U 1 1 59BCEAE4
P 6750 4850
F 0 "PI-GPIO1" H 6750 5150 50 0000 C CNN
F 1 "CONN_02X05" H 6750 4550 50 0000 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_2x05" H 6200 5250 50 0000 C CNN
F 3 "" H 6750 3650 50 0000 C CNN
1 6750 4850
1 0 0 -1
$EndComp
Wire Wire Line
7000 4850 7550 4850
Wire Wire Line
7550 4850 7550 4750
Wire Wire Line
7550 4750 7650 4750
Wire Wire Line
7000 4950 7600 4950
Wire Wire Line
7600 4950 7600 4850
Wire Wire Line
7600 4850 7650 4850
Wire Wire Line
7000 5050 7650 5050
Wire Wire Line
7650 5050 7650 4950
$Comp
L GND #PWR01
U 1 1 59BCEDDF
P 7300 4850
F 0 "#PWR01" H 7300 4600 50 0001 C CNN
F 1 "GND" H 7300 4700 50 0000 C CNN
F 2 "" H 7300 4850 50 0000 C CNN
F 3 "" H 7300 4850 50 0000 C CNN
1 7300 4850
1 0 0 1
$EndComp
$Comp
L +5V #PWR02
U 1 1 59BCF0FF
P 7900 4000
F 0 "#PWR02" H 7900 3850 50 0001 C CNN
F 1 "+5V" H 7900 4140 50 0000 C CNN
F 2 "" H 7900 4000 50 0000 C CNN
F 3 "" H 7900 4000 50 0000 C CNN
1 7900 4000
-1 0 0 1
$EndComp
$Comp
L GND #PWR03
U 1 1 59BCF11C
P 8300 4000
F 0 "#PWR03" H 8300 3750 50 0001 C CNN
F 1 "GND" H 8300 3850 50 0000 C CNN
F 2 "" H 8300 4000 50 0000 C CNN
F 3 "" H 8300 4000 50 0000 C CNN
1 8300 4000
1 0 0 -1
$EndComp
Wire Wire Line
7000 4500 7000 4750
Connection ~ 7000 4650
Wire Wire Line
7000 4650 7650 4650
NoConn ~ 6500 4650
NoConn ~ 6500 4750
NoConn ~ 6500 4850
NoConn ~ 6500 4950
NoConn ~ 6500 5050
$Comp
L PWR_FLAG #FLG04
U 1 1 59C3E871
P 7900 4000
F 0 "#FLG04" H 7900 4095 50 0001 C CNN
F 1 "PWR_FLAG" H 7900 4180 50 0000 C CNN
F 2 "" H 7900 4000 50 0000 C CNN
F 3 "" H 7900 4000 50 0000 C CNN
1 7900 4000
1 0 0 -1
$EndComp
$Comp
L PWR_FLAG #FLG05
U 1 1 59C3E889
P 8300 4000
F 0 "#FLG05" H 8300 4095 50 0001 C CNN
F 1 "PWR_FLAG" H 8300 4180 50 0000 C CNN
F 2 "" H 8300 4000 50 0000 C CNN
F 3 "" H 8300 4000 50 0000 C CNN
1 8300 4000
1 0 0 -1
$EndComp
$Comp
L +5V #PWR06
U 1 1 59C3E8A7
P 7000 4500
F 0 "#PWR06" H 7000 4350 50 0001 C CNN
F 1 "+5V" H 7000 4640 50 0000 C CNN
F 2 "" H 7000 4500 50 0000 C CNN
F 3 "" H 7000 4500 50 0000 C CNN
1 7000 4500
1 0 0 -1
$EndComp
$EndSCHEMATC

122
parts/electronic/Serial-SHIM/Serial-SHIM.xml Normal file
View File

@ -0,0 +1,122 @@
<?xml version="1.0" encoding="UTF-8"?>
<export version="D">
<design>
<source>/home/arofarn/Make/Cameteo/Serial-SHIM/Serial-SHIM.sch</source>
<date>jeu. 21 sept. 2017 18:27:42 CEST</date>
<tool>Eeschema 4.0.2+dfsg1-stable</tool>
<sheet number="1" name="/" tstamps="/">
<title_block>
<title/>
<company/>
<rev/>
<date/>
<source>Serial-SHIM.sch</source>
<comment number="1" value=""/>
<comment number="2" value=""/>
<comment number="3" value=""/>
<comment number="4" value=""/>
</title_block>
</sheet>
</design>
<components>
<comp ref="Serial1">
<value>CONN_01X04</value>
<footprint>Pin_Headers:Pin_Header_Straight_1x04</footprint>
<libsource lib="conn" part="CONN_01X04"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>59BCE9F7</tstamp>
</comp>
<comp ref="PI-GPIO1">
<value>CONN_02X05</value>
<footprint>Pin_Headers:Pin_Header_Straight_2x05</footprint>
<libsource lib="conn" part="CONN_02X05"/>
<sheetpath names="/" tstamps="/"/>
<tstamp>59BCEAE4</tstamp>
</comp>
</components>
<libparts>
<libpart lib="conn" part="CONN_01X04">
<description>Connector 01x04</description>
<footprints>
<fp>Pin_Header_Straight_1X04</fp>
<fp>Pin_Header_Angled_1X04</fp>
<fp>Socket_Strip_Straight_1X04</fp>
<fp>Socket_Strip_Angled_1X04</fp>
</footprints>
<fields>
<field name="Reference">P</field>
<field name="Value">CONN_01X04</field>
</fields>
<pins>
<pin num="1" name="P1" type="passive"/>
<pin num="2" name="P2" type="passive"/>
<pin num="3" name="P3" type="passive"/>
<pin num="4" name="P4" type="passive"/>
</pins>
</libpart>
<libpart lib="conn" part="CONN_02X05">
<description>Connector 02x05</description>
<footprints>
<fp>Pin_Header_Straight_2X05</fp>
<fp>Pin_Header_Angled_2X05</fp>
<fp>Socket_Strip_Straight_2X05</fp>
<fp>Socket_Strip_Angled_2X05</fp>
</footprints>
<fields>
<field name="Reference">P</field>
<field name="Value">CONN_02X05</field>
</fields>
<pins>
<pin num="1" name="P1" type="passive"/>
<pin num="2" name="P2" type="passive"/>
<pin num="3" name="P3" type="passive"/>
<pin num="4" name="P4" type="passive"/>
<pin num="5" name="P5" type="passive"/>
<pin num="6" name="P6" type="passive"/>
<pin num="7" name="P7" type="passive"/>
<pin num="8" name="P8" type="passive"/>
<pin num="9" name="P9" type="passive"/>
<pin num="10" name="P10" type="passive"/>
</pins>
</libpart>
</libparts>
<libraries>
<library logical="conn">
<uri>/usr/share/kicad/library/conn.lib</uri>
</library>
</libraries>
<nets>
<net code="1" name="Net-(PI-GPIO1-Pad10)">
<node ref="Serial1" pin="4"/>
<node ref="PI-GPIO1" pin="10"/>
</net>
<net code="3" name="+5V">
<node ref="PI-GPIO1" pin="4"/>
<node ref="Serial1" pin="1"/>
<node ref="PI-GPIO1" pin="2"/>
</net>
<net code="4" name="Net-(PI-GPIO1-Pad1)">
<node ref="PI-GPIO1" pin="1"/>
</net>
<net code="5" name="Net-(PI-GPIO1-Pad3)">
<node ref="PI-GPIO1" pin="3"/>
</net>
<net code="6" name="Net-(PI-GPIO1-Pad5)">
<node ref="PI-GPIO1" pin="5"/>
</net>
<net code="7" name="Net-(PI-GPIO1-Pad7)">
<node ref="PI-GPIO1" pin="7"/>
</net>
<net code="8" name="Net-(PI-GPIO1-Pad9)">
<node ref="PI-GPIO1" pin="9"/>
</net>
<net code="9" name="Net-(PI-GPIO1-Pad6)">
<node ref="Serial1" pin="2"/>
<node ref="PI-GPIO1" pin="6"/>
</net>
<net code="10" name="Net-(PI-GPIO1-Pad8)">
<node ref="Serial1" pin="3"/>
<node ref="PI-GPIO1" pin="8"/>
</net>
</nets>
</export>